This project is maintained by lawrie
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Simon Monk’s book : Programming FPGAs: Getting Started with Verilog is good for beginners and explains how to program in Verilog and drive simple hardware.
Its examples are for commercial FPGAs, so need some conversion to run on Blackice Mx.
Steven Hugg’s book Designing Video Game Hardware in Verilog is good if you are interested in retro computing.
It has an interesting companion web site with an online editor and simulator for Verilog.
The fpga4fun web site is very good, and the source of some of the examples in this ebook.
The fpga4student also has some interesting projects.
The FPGA Wars community have a Verilog tutorial.
The ZipCPU blog is a bit more advanced, but is very good on topics such as formal verification and using industry-standard buses such as Wishbone and AXI.
Udemy has some FPGA and Verilog courses.
Verilog Simulator: iVerilog
Signal viewer: GTKWave
A fast verilog Simulator: Verilator
There is a list of RISC-V cores and SoC platforms on github, but it is not complete.
Some of the RISC-V cores that run on ice40 devices include:
BlackSoc - only works on Blackice II
[FuseSoC}(https://github.com/olofk/fusesoc)
SpinalHDL is the Scala-based language that VexRiscv and SaxonSoc is written in. Its author is Charles Papn (Dolu1990). There is online documentation.
migen is a python based language used by Litex.
nmigen is a newer version of migen.
Chisel is another Scala-based language used by the Sifive Risc-V implementations.
clash is a Haskell-based functional HDL.
There are a lot of open source FPGA board. Here are some of the current popular ones:
The Mist and Mister projects are good sources of Retro Computing FPGA implementations, but many are in VHDL and need converting to Verilog. Most need some conversion to use the Blackice Mx SDRAM.
There are several goof 6502 CPU implementations in Verilog.
A commonly used one in Arlet, which is used in the Acorn Atom project. One problem with this for some rettro computers is that it is not cycle-accurate.
The NES implementation has a cycle-accurate microcode implementation.
There is a good Verilog microcoded Z80 implementation in David Banks’s CP/M Z80 implementation.
There are other forums for ice40 FPGA boards.
Some popular ones are:
Channels:
#mystorm
#yosys
##openfpga
1BitSquared #icebreaker
SpinalHDL/SpinalHDL
SpinalHDL/VexRiscv
Some Open FPGA twitter accounts:
@folknology Alan Wood
@oe1cxw Clofford Wolf
@fpga_dave Dave Shah
@ico_TC
@esden Piotr Esden-Tempski, creator of the iCEBreaker board
@zipcpu Dan Gisselquist
@TinyFPGA Luke Valenty
@mithro Tim Ansell, creator of the Fomu board
@RadionaOrg Creators of the ULX3S ECP5 board
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